PIPELINESTATUS: Drafting
UpcomingWhy unfenced Tcl breaks Markdown → PDF (and how we fix it)
Pandoc treats $T as math. Real SDC does not. A short post on the Ace-Seek preprocessor logic.
Engineering Hub
Technical Blog & Engineering Notes
In-depth writeups on VLSI design bottlenecks, Markdown+LaTeX compilation engines, and SDC timing formulations written for hardware engineers.
- VLSI TIMINGSTATUS: DraftingUpcoming
Formulating clock uncertainty without the spreadsheet chaos
Setup vs hold, jitter derates, and a clean path from whiteboard to production SDC lines.
- DOCUMENTATIONSTATUS: DraftingUpcoming
Wide STA tables: when A4 geometry is not enough
Landscape, A3 page breaking, and custom geometry for box-drawing timing table rendering.
Open Script Repository
Public automation snippets and TCL flow glue will land here — free distribution to empower hardware teams.